One prior computer architecture technique to increase computer performance is the use of parallelism. One prior type of parallelism is parallel instruction execution. Parallel instruction execution means that two or more instructions are executed at substantially the same time in a computer system.
In one prior computer system, instructions are at all times executed in parallel. In this prior computer system, parallelism is the only mode of operation. One disadvantage of this full time parallel approach is that it wastes space in memory.
In another prior computer system however, the computer system switches between a single instruction sequential mode and a dual instruction parallel execution mode. In this prior computer system, there is no delay in switching between the single instruction mode and the dual instruction parallel mode. One disadvantage of this no-delay system is that relatively complicated decoding logic is required in order to determine without delay that the dual-instruction parallel mode is to be entered or exited from. This prior system requires parallel decoding logic and relatively long critical circuit delays. The result is a relative increase in hardware complexity.